Module prelude 

The prelude exports a number of structs which are useful in representing things to do with the TX-2. Providing this prelude is the main purpose of the base crate.

Re-exports

pub use super::quarters::Quarter;

pub use super::splay::cycle_and_splay;

pub use super::splay::unsplay;

pub use super::subword::join_halves;

pub use super::subword::join_quarters;

pub use super::subword::left_half;

pub use super::subword::right_half;

pub use super::subword::split_halves;

pub use super::instruction::*;

Macros

u5

u6

u9

u18

u36

Structs

Address

An address has 17 normal value bits. There are 18 bits for the operand base address in the instruction word, but the topmost bit signals a deferred (i.e. indirect) access, so we should never see a memory access to an address with the 0o400_000 bit set.

Signed5Bit

Signed5Bit is somewhat special-purpose for instructions such as JPX which use the instruction’s configuration value as a 5-bit signed integer.

Signed6Bit

Signed6Bit is somewhat special-purpose as the signed counterpart for Unsigned6Bit, which is for handlng index register numbers and sequence numbers.

Signed9Bit

Signed counterpart of Unsigned9Bit.

Signed12Bit

Signed counterpart of Unsigned12Bit.

Signed18Bit

Signed counterpart of Unsigned18Bit.

Signed36Bit

Signed counterpart of Unsigned36Bit.

Unsigned5Bit

Unsigned5Bit is used as a system configuration value; that is, an index into F-memory.

Unsigned6Bit

Unsigned6Bit is used as an X-register address. That is, the j in Xj.

Unsigned9Bit

Unsigned9Bit is the value of a “quarter” of the 36-bit TX-2 machine word. A number of instructions - and in particular the Exchange Unit - work on the quarters of a word.

Unsigned12Bit

Unsigned12Bit is used as the mode of a connected I/O device.

Unsigned18Bit

Unsigned18Bit is the value of a “half” of the 36-bit TX-2 machine word. We use this type to hold STUV-memory addresses, among other things. Physical memory addresses though are only 17 bits wide. The remaining bit can be used to “mark” an address either for tracing (when it’s an instruction address) or for deferred addressing (when it’s an operand address).

Unsigned36Bit

Unsigned36Bit is the basic machine word of the TX-2. This is the width of the registers in the Arithmetic Unit, and it is the unit on which the Exchange Unit operates when performing memory fetches or stores. This is also the width of all instructions.

Enums

ConversionFailed

Represents a failure to convert to or from one of the signed or unsigned types defined in the base crate.

StringConversionFailed

Constants

PLACEHOLDER_MARK_BIT

Placeholders (saved sequence instruction pointers in the index registers) use bit 2.9 to indicate that sequence switches to marked sequences should trap to sequence 42. This means that the mark bit needs to be retained in the program counter (P register) so that the sequence is still “marked” after it has run.

Traits

IndexBy

The IndexBy trait implements address arithmetic (adding a signed or unsigned value to an address).

Type Aliases

SequenceNumber