Expand description
Binary and symbolic representations of TX-2 instructions.
A TX-2 instruction occupies 36 bits. The 36 bits look like this (least significant bit on the right, bits numbered 0 to 35 in decimal):
| Hold | Configuration | Opcode | Index | Defer | Operand Memory Address |
|---|---|---|---|---|---|
| 1 bit | 5 bits | 6 bits | 6 bits | 1 bit | 17 bits |
| (35) | (30-34) | (24-29) | (18-23) | (0-16) |
This diagram is taken from section 6-2.1 “INSTRUCTION WORDS” of the TX-2 Users Handbook (page 6-4, being the 157th page of my PDF file).
There is a similar diagram in Fig. 5 (p. 11) of “A Functional Description of the Lincoln TX-2 Computer” by John M. Frankovitch and H. Philip Peterson, but that is older and, I believe, inaccurate in the width of the configuration field for example. Section 6-2.1 of the User Handbook confirms that the configuration “syllable” is 5 bits.
Table 7-2 in the user guide defines values of cf for the range 0
to 037 inclusive in terms of the standard contents that they fetch
from the F-memory.
In the programming examples (6M-5780, page 6) we have
34 21 00 377,751 ³⁴SPF 377,751Here, the operand memory address is 0377751. The index is 00.
The opcode is SPF, octal 21. The top 6 bits are 034, or 11100
binary. The user guide states that SPF is not configurable, so
presumably the configuration field simply specifies the address in
F-memory that we will write to.
Later in the same page we have
74 11 71 377,762 ³⁴RSX⁷¹ 377,762It seems that the conventions for specifyign index registers changed between the writing of that memo and the finalisation of the syntax for the M4 assembler, and so in the 1963 assembler input format, this would be:
74 11 71 377,762 ³⁴RSX₇₁ 377,762RSX is opcode 11. Hence the top 6 bits are 074 = 111100 binary,
Of those only 034=11100 binary seem to be configuration code. But
the hold bit seems to be set without this being indicated in the
symbolic form of the instruction. Perhaps this was something that
changed after the writing of the memo; certainly RSX is not one
of the instruction listed in section 4-3.2 with a default-hold bit
(TSD, JNX, JPX).
Modules§
- format 🔒
Structs§
- Instruction
- A TX-2 Instruction.
- Operand
Address OperandAddressrepresents the least-significant 18 bits of an instruction word. If the top bit is set, this indicates the use of deferred addressing (i.e. this bit has the same significance as it does in TX-2 instructions).- SkmBit
Selector SkmBitSelectoris primarily for use with the SKM instruction which can access bits 1-9 of quarters, plus the meta and parity bits (of the full word). Hence the wider range. See theindex_address_to_bit_selectionfunction.- Symbolic
Instruction - A TX-2 instruction broken down into its component fields.
Enums§
- Disassembly
Failure - Signals that an
Instructioncould not be converted to aSymbolicInstruction. - Nonexistent
BitPos - While examples usually choose 0 as the non-existent bit position, the index portion of the instruction word (which encodes the quarter and bit position for SKM instructions) stores two bits of quarter number and four bits of bit position, meaning that the possible range of bit positions is 0..=15 (decimal).
- Opcode
Opcodeenumerates all the valid TX-2 opcodes. These values are taken from the User Handbook. Volume 3 of the Technical Manual (page 1-5-3) describes opcodes 00, 01, 02, 03, 04 (mentioning bit 2.8 of N being in state 1), 13, 23, 33, 45, 50, 51, 52, 53, 63, 73 as being undefined.- SkmBit
Pos
Constants§
Traits§
- Inst
- The
Insttrait provides a way to extract the various fields within an instruction.
Functions§
- index_
address_ to_ bit_ selection - Convert the index address field of an SKM instruction into a
BitSelectorstruct describing which bit we will operate on.